Visible light Internet of Things platform
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Products and Services
Design and application of chips
Li-IOT intelligent hardware
Li-IOT cable/connector
Design and application of chips
The core team of chip technology consists of a number of well-known integrated circuit (IC) design experts at home and abroad, which has abundant circuit design experiences and the first-rate experience of ability of the research and development and innovation of chips and product conversion. In the development history for 9 years, several chips with visible light communication as the core are developed and designed and the design services of various chips are provided.
Digital chip
High-speed visible light transmission baseband processor chip with high integrity and low power consumption
Based on the built-in 4-channel visible light receiving and dispatching module, two-way transparent transmission over Ethernet is achieved in conjunction with the visible light front-end circuit, and data transmission rate of each channel is 400Mbps or 120Mbps
Based on the built-in GMII network interface, support Gigabit Ethernet PHY and 10/100/1000M Ethernet standard
Simulation chip
Achieve two-way transparent transmission over Ethernet by coordinating with the digital circuit at the rear end
It mainly includes LED drive circuit and PD receiving amplification part
It has strong constant current ability, high efficiency, high gain, high stability and other advantages
Internet of Things chip
Focus on Li-IoT Internet of Things direction
Represented by H1901 and H1903 chips, the Hreo series chip is about to be released in 2019
Fully meet the requirements of low power consumption, interference immunity, safety, reliability and other Internet of Things applications
Chip design
Provide human resource of development in each design stage
Provide complete IC design development
Provide the outsourcing service of integrated electronic circuit design
Cooperate with Foundry, Package & Testing and other manufacturers for multiple years, and provide perfect services from design and tapeout in the early stage to packaging and testing in the later state
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